Pyeongsu Park
Research Scientist @ Meta
E-mail: pyeongsu _at_ meta.com, pyeongsu _at_ snu.ac.kr, pyeongsu.park _at_ postech.ac.kr
[Google scholar] [Linked In]
Research Interests
- Overall Computer Architecture & Systems
- Machine Learning Systems
- Storage Systems
- Resource Disaggregation
- Large-scale System Design & Modeling
Research Experiences
- Meta, CA, USA
- Research Scientsit (AI and Systems Co-Design)
- Mar. 2024 – Current
- Seoul National University (SNU), Seoul, South Korea
- Research Assistant, High Performance Computer System (HPCS) Lab
- Advisor: Prof. Jangwoo Kim
- Mar. 2017 – Feb. 2022
- Samsung Semiconductor Inc., CA, USA
- Visiting Researcher, Memory Solutions Lab
- Mentor: Dr. Yangseok Ki
- Feb. 2020 – Aug. 2020
- POSTECH, Pohang, South Korea
- Research Assistant, High Performance Computing (HPC) Lab
- Advisor: Prof. Jangwoo Kim
- Sep. 2015 – Feb. 2017
- POSTECH, Pohang, South Korea
- Research Assistant (as a part of the Lab rotation program), Compiler Research Lab (CoreLab)
- Advisor: Prof. Hanjoon Kim
- June. 2015 – Aug. 2015
- POSTECH, Pohang, South Korea
- Research Assistant (as a part of the Lab rotation program), Device and Intergrated Circuite Engineering Lab (DICE LAB)
- Advisor: Prof. Jaejoon Kim
- Mar. 2015 – May. 2015
Education
- Seoul National University (SNU), Seoul, South Korea
- Ph.D. in Electrical and Computer Engineering (ECE)
- Advisor: Prof. Jangwoo Kim
- Dissertation: Scalable Deep Learning Server Architecture with Heterogeneous Accelerators
- Mar. 2017 – Feb. 2022
- POSTECH, Pohang, South Korea
- M.S. in Creative IT Engineering (CiTE)
- Advisor: Prof. Jangwoo Kim
- Thesis: Analysis on Deduplication Characteristics in Primary Storage
- Mar. 2015 – Feb. 2017
- StonyBrook, NY, US
- Exchange Student
- June. 2012 – Dec. 2012
- POSTECH, Pohang, South Korea
- B.S. in Creative IT Engineering (CiTE)
- Summa cum laude
- Mar. 2012 – Feb. 2015
- Jeonbuk Science High School, Iksan, South Korea
Publications
- DLS: A Fast and Flexible Neural Network Training System with Fine-grained Heterogeneous Device Orchestration
Pyeongsu Park, Jaewon Lee, Heetaek Jeong, and Jangwoo Kim
IEEE Transactions on Parallel and Distributed Systems (TPDS), Volume: 33, Issue: 11, 01 Nov. 2022
- TrainBox: An Extreme-Scale Neural Network Training Server Architecture by Systematically Balancing Operations
Pyeongsu Park, Heetaek Jeong, and Jangwoo Kim
Proceedings of the 53rd IEEE/ACM International Symposium on Microarchitecture (MICRO), Oct. 2020
- FIDR: A Scalable Storage System for Fine-Grain In-Line Data Reduction with Efficient Memory Handling
Mohammadamin Ajdari, Wonsik Lee, Pyeongsu Park, Joonsung Kim, and Jangwoo Kim
Proceedings of the 52nd IEEE/ACM International Symposium on Microarchitecture (MICRO), Oct. 2019
- CIDR: A Cost-Effective In-line Data Reduction System for Terabit-per-Second Scale SSD Arrays
Mohammadamin Ajdari, Pyeongsu Park, Joonsung Kim, Dongup Kwon, and Jangwoo Kim
Proceedings of the 25th IEEE International Symposium on High-Performance Computer Architecture (HPCA), Feb. 2019
Best Paper Runnuer-Up in HPCA 2019
Honorable Mention in IEEE MICRO Top Picks 2020
- SSDcheck: Timely and Accurate Prediction of Irregular Behaviors in Black-Box SSDs
Joonsung Kim, Pyeongsu Park, Jaehyung Ahn, Jihun Kim, Jong Kim, and Jangwoo Kim
Proceedings of the 51st IEEE/ACM International Symposium on Microarchitecture (MICRO), Oct. 2018
- SSD Performance Modeling Using Bottleneck Analysis
Jihun Kim, Joonsung Kim, Pyeongsu Park, Jong Kim, and Jangwoo Kim
IEEE Computer Architecture Letters (CAL), Jan. 2018
- A Scalable HW-Based Inline Deduplication for SSD Arrays
*Mohammadamin Ajdari, *Pyeongsu Park, Dongup Kwon, Joonsung Kim, and Jangwoo Kim
IEEE Computer Architecture Letters (CAL), Jan. 2018 (* equal contribution)
Invited Talks & Posters
- TrainBox: An Extreme-Scale Neural Network Training Server Architecture by Systematically Balancing Operations, Cloud & Datacenter @ Micro53, 2020 (virtual)
- An Extreme-Scale Neural Network Server Architecture, Samsung Semiconductor Inc., Memory Solutions Lab, 2020 (virtual)
- FIDR: A Scalable Storage System for Fine-Grain In-Line Data Reduction with Efficient Memory Handling (Lightning talk & poster), Storage Sytems @ Micro52, Columbus, Ohio, USA, 2019
- CIDR: A Cost-Effective In-line Data Reduction System for Terabit-per-Second Scale SSD Arrays, Best Paper Nominees @ HPCA25, Washington D.C., USA, 2019
Honors and Awards
- Creative IT Engineering Scholarship for graduate students (covers full tuition and stipend), Mar. 2015 – Feb. 2017
- Creative IT Engineering Scholarship for undergraduate students (covers full tuition and stipend), Mar. 2012 – Feb. 2015
- Final Round @ Codegate 2014 CTF (as a member of team PLUS@postech), Apr. 2014
Professional Service
-
Journal Reviewer
- IEEE Micro, 2023
- IEEE Transactions on Emerging Topics in Computing (TETC), 2023
- Journal of Supercomputing, 2023
- ACM Transactions on Architecture and Code Optimization (TACO), 2022
- IEEE Computer Architecture Letters (CAL), 2022
- IEEE Transaction on Computers (TC), 2022
Teaching Experience
- Spring 2018, ECE311 Computer Organization, SNU, Teaching assistant
- Fall 2017, ECE311 Digital System Design and Lab, SNU, Teaching assistant
- Spring 2017, ECE311 Computer Organization, SNU, Teaching assistant
- Spring 2015, CiTE221 Digtal System and Microprocessor Design and Lab, POSTECH, Teaching assistant