Junehyuk Boo 부준혁
Research Interests
- Computer Architecture & System
- FPGA Acceleration & Prototyping
- Computer Networking
- Storage Systems
- Virtualization
Publications
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F4T: A Fast and Flexible FPGA-based Full-stack TCP Acceleration Framework
Junehyuk Boo, Yujin Chung, Eunjin Baek, Seongmin Na, Changsu Kim, and Jangwoo Kim
ACM/IEEE International Symposium on Computer Architecture (ISCA), Jun. 2023
Architecture System Network FPGABibTeX
@inproceedings{boo2023f4t, author = {Boo, Junehyuk and Chung, Yujin and Baek, Eunjin and Na, Seongmin and Kim, Changsu and Kim, Jangwoo}, title = {F4T: A Fast and Flexible FPGA-based Full-stack TCP Acceleration Framework}, year = {2023}, isbn = {9798400700958}, publisher = {Association for Computing Machinery}, address = {New York, NY, USA}, url = {https://doi.org/10.1145/3579371.3589090}, doi = {10.1145/3579371.3589090}, abstract = {As complex workloads that run on many servers are pursuing higher networking throughput, more CPU cycles are consumed to support the TCP stack. To mitigate the high CPU burden from executing the compute-intensive TCP, prior works have proposed to offload TCP processing to the embedded processors, ASICs, or FPGAs in network devices. However, none of the approaches satisfy all of the critical requirements of TCP simultaneously, which are high performance, many connections, and high flexibility. Embedded processors do not provide enough performance to fully offload the TCP stack, while ASICs fail to provide enough flexibility. Meanwhile, existing FPGA-based TCP accelerators either fail to provide high performance or give up some of the critical features and requirements to achieve high performance due to their inefficient processing architecture.This paper proposes F4T, a fast and flexible FPGA-based full-stack TCP acceleration framework to effectively save CPU cycles by achieving high performance, supporting many connections, and providing high flexibility. By analyzing the existing FPGA-based TCP accelerators, we identify that the key performance bottleneck arises from two factors: (1) inefficient processing of stateful operations that incurs stalls and (2) lack of TCP state management necessary for utilizing multiple memory modules. To resolve the identified bottlenecks, we design F4T to process stateful operations back-to-back without stalls and efficiently manage the TCP states among multiple memory modules. F4T also provides a full software-hardware stack that allows applications to easily utilize F4T without any modifications. Our evaluation results show that F4T saturates the 100Gbps link bandwidth with only two CPU cores while supporting many connections and providing high flexibility. F4T saves 64\% CPU cycles and provides 2.8\texttimes{} CPU cycles to applications compared to Linux's TCP stack when running the Nginx web server.}, booktitle = {Proceedings of the 50th Annual International Symposium on Computer Architecture}, articleno = {55}, numpages = {13}, keywords = {high performance networking, full-stack TCP acceleration, FPGA accelerator, FPGA prototyping, TCP offload engine (TOE), transmission control protocol (TCP)}, location = {Orlando, FL, USA}, series = {ISCA '23} } -
SmartFVM: A Fast, Flexible, and Scalable Hardware-based Virtualization for Commodity Storage Devices
Dongup Kwon, Wonsik Lee, Dongryeong Kim, Junehyuk Boo, and Jangwoo Kim
ACM Transactions on Storage (TOS), Apr. 2022
System Storage Virtualization FPGABibTeX
@inproceedings{kwon2022smartfvm, author = {Kwon, Dongup and Lee, Wonsik and Kim, Dongryeong and Boo, Junehyuk and Kim, Jangwoo}, title = {SmartFVM: A Fast, Flexible, and Scalable Hardware-based Virtualization for Commodity Storage Devices}, year = {2022}, issue_date = {May 2022}, publisher = {Association for Computing Machinery}, address = {New York, NY, USA}, volume = {18}, number = {2}, issn = {1553-3077}, url = {https://doi.org/10.1145/3511213}, doi = {10.1145/3511213}, abstract = {A computational storage device incorporating a computation unit inside or near its storage unit is a highly promising technology to maximize a storage server’s performance. However, to apply such computational storage devices and take their full potential in virtualized environments, server architects must resolve a fundamental challenge: cost-effective virtualization. This critical challenge can be directly addressed by the following questions: (1) how to virtualize two different hardware units (i.e., computation and storage), and (2) how to integrate them to construct virtual computational storage devices, and (3) how to provide them to users. However, the existing methods for computational storage virtualization severely suffer from their low performance and high costs due to the lack of hardware-assisted virtualization support.In this work, we propose SmartFVM-Engine, an FPGA card designed to maximize the performance and cost-effectiveness of computational storage virtualization. SmartFVM-Engine introduces three key ideas to achieve the design goals. First, it achieves high virtualization performance by applying hardware-assisted virtualization to both computation and storage units. Second, it further improves the performance by applying hardware-assisted resource orchestration for the virtualized units. Third, it achieves high cost-effectiveness by dynamically constructing and scheduling virtual computational storage devices. To the best of our knowledge, this is the first work to implement a hardware-assisted virtualization mechanism for modern computational storage devices.}, journal = {ACM Trans. Storage}, month = apr, articleno = {12}, numpages = {27}, keywords = {Computational storage} } -
A Fast and Flexible Hardware-based Virtualization Mechanism for Computational Storage Devices
Dongup Kwon, Dongryeong Kim, Junehyuk Boo, Wonsik Lee, and Jangwoo Kim
USENIX Annual Technical Conference (ATC), Jul. 2021
System Storage Virtualization FPGABibTeX
@inproceedings{kwon2021flexcsv, author = {Dongup Kwon and Dongryeong Kim and Junehyuk Boo and Wonsik Lee and Jangwoo Kim}, title = {A Fast and Flexible Hardware-based Virtualization Mechanism for Computational Storage Devices}, booktitle = {2021 USENIX Annual Technical Conference (USENIX ATC 21)}, year = {2021}, isbn = {978-1-939133-23-6}, pages = {729--743}, url = {https://www.usenix.org/conference/atc21/presentation/kwon}, publisher = {USENIX Association}, month = jul } -
FVM: FPGA-assisted Virtual Device Emulation for Fast, Scalable, and Flexible Virtualization
Dongup Kwon, Junehyuk Boo, Dongryeong Kim, and Jangwoo Kim
USENIX Symposium on Operating Systems Design and Implementation (OSDI), Nov. 2020
System Storage Virtualization FPGABibTeX
@inproceedings{kwon2020fvm, author = {Dongup Kwon and Junehyuk Boo and Dongryeong Kim and Jangwoo Kim}, title = {FVM: FPGA-assisted Virtual Device Emulation for Fast, Scalable, and Flexible Storage Virtualization}, booktitle = {14th USENIX Symposium on Operating Systems Design and Implementation (OSDI 20)}, year = {2020}, isbn = {978-1-939133-19-9}, pages = {955--971}, url = {https://www.usenix.org/conference/osdi20/presentation/kwon}, publisher = {USENIX Association}, month = nov }
Education and Experience
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MangoBoost, Seoul, South Korea
- System Architect
- Jan. 2022 – Feb. 2024
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Seoul National University (SNU), Seoul, South Korea
- Ph.D. Student in Electrical and Computer Engineering
- Advisor: Prof. Jangwoo Kim
- Mar. 2020 – Current
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Seoul National University (SNU), Seoul, South Korea
- B.S. in Electrical and Computer Engineering
- Summa Cum Laude
- Mar. 2016 – Feb. 2020
Academic Services
- Journal Reviews
Honors and Awards
- KFAS Graduate Student Scholarship
- Korea Foundation for Advanced Studies (KFAS)
- 2020 – Current
- Kwanjeong Scholarship
- Kwanjeong Educational Foundation (KEF)
- 2018 – 2019
Teaching Experience
- Teaching Assistant
- SNU, ECE636: Computer Organization and Design (Spring 2021)
- SNU, ECE315A: Digital Systems Design and Experiments (Fall 2020)
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