Cryogenic/Superconducting/Quantum Computers

Members: Dongmoon Min, Ilkwon Byun, Junpyo Kim, Junhyuk Choi, Jungmin Cho

Motivation

High-performance computing and data center industry always requires the fastest and most power-efficient computer systems. However, facing the end of single-thread and multi-thread performance scaling, computer architects now suffer from critical challenges to further improve the performance and power efficiency with conventional room-temperature computing.

To resolve the problems, we have focused on cryogenic/superconducting/quantum computing which architects and operates computers at extremely low temperatures. Our research goal is to maximize the performance of conventional computers (i.e., cryogenic/superconducting computing) and to realize the next-generation innovative computers (e.g., superconducting AI accelerator, scalable quantum computer). Our key achievements can be briefly summarized as (1) 77K CMOS-based cryogenic computing, (2) 4K superconductor-based computing, and (3) mK fault-tolerant quantum computing.

Research

CMOS-based cryogenic computer [ISCA’19, ASPLOS’20, ISCA’20, ISCA’21, TopPicks’21, ASPLOS’22]. As 77K (or -196C) temperature can be cost-effectively achieved by applying Liquid Nitrogen and CMOS devices still reliably operate at 77K, we aim to design computer architecture devices running at 77K.  For this purpose, we build our own architecture performance and power simulation methodology for the memory, cache, and processor running at 77K, and introduce their temperature-optimized architecture designs, which are CryoRAM (cryogenic-optimal memory), CryoGuard (retention-free robust cryogenic memory), CryoCache (cryogenic-optimal cache), CryoCore (cryogenic-optimal processor), and CryoWire (cryogenic-optimal pipeline and NoC). We also release our validated performance modeling framework (CryoModel) to the public.

SFQ-based superconducting computer [MICRO’20, TopPicks’21]. To achieve an extreme performance by reducing the temperature much further, we also focus on extremely low temperatures such as <4K (or -269C) or superconducting temperatures. But, at <4K, architects should use superconducting transistors (e.g., RSFQ, AQFP) whose architecture design principles have not been yet actively explored. To resolve the issue, we design a computer architecture modeling tool for <4K, and develop superconducting computer designs. For example, SuperNPU, our joint work with Kyushu University and Nagoya University, shows how to architect an extreme-performance domain accelerator with the superconducting devices.

Fault-tolerant quantum computer [ISCA’22, ISCA’23]. 10,000 qubit-scale (i.e., 10+K qubit) fault-tolerant quantum computer is essential to achieve a true sense of quantum supremacy. With the recent effort toward the large-scale quantum computer, architects have revealed various scalability issues in developing the quantum computer’s control system. But, it has been difficult to identify and resolve the control system’s scalability bottleneck due to the absence of a reliable tool. To resolve the challenge, we developed XQsim and QIsim, the open-source cross-technology quantum-control system simulators, and propose 10+K qubit-scale quantum control systems. We also release XQsim and QIsim frameworks to contribute to the research community.

Software release

Publications

  • A Fault-Tolerant Million Qubit-Scale Distributed Quantum Computer
    Junpyo Kim, Dongmoon Min, Jungmin Cho, Hyeonseong Jeong, Ilkwon Byun, Junhyuk Choi, Juwon Hong, and Jangwoo Kim
    29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), Apr. 2024
  • QIsim: Architecting 10+K Qubit QC Interfaces Toward Quantum Supremacy
    Dongmoon Min, Junpyo Kim, Junhyuk Choi, Ilkwon Byun, Masamitsu Tanaka, Koji Inoue, and Jangwoo Kim
    ACM/IEEE International Symposium on Computer Architecture (ISCA), Jun. 2023
  • XQsim: Modeling Cross-Technology Control Processors for 10+K Qubit Quantum Computers
    Il-Kwon Byun, Junpyo Kim, Dongmoon Min, Ikki Nagaoka, Kosuke Fukumitsu, Iori Ishikawa, Teruo Tanimoto, Masamitsu Tanaka, Koji Inoue, and Jangwoo Kim
    ACM/IEEE International Symposium on Computer Architecture (ISCA), Jun. 2022
  • CryoWire: Wire-Driven Microarchitecture Designs for Cryogenic Computing
    Dongmoon Min*, Yujin Chung*, Ilkwon Byun, Junpyo Kim, and Jangwoo Kim
    ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), Feb 2022
  • CryoGuard: A Near Refresh-Free Robust DRAM Design for Cryogenic Computing
    Gyuhyeon Lee, Seongmin Na, Ilkwon Byun, Dongmoon Min, and Jangwoo Kim
    ACM/IEEE International Symposium on Computer Architecture (ISCA), June. 2021
  • A Next-Generation Cryogenic Processor Architecture
    Ilkwon Byun*, Dongmoon Min*, Gyu-Hyeon Lee, Seongmin Na, and Jangwoo Kim
    IEEE Micro Special Issue: Top Picks from Computer Architecture Conferences (IEEE’s Micro Top Picks), May/June. 2021
  • Superconductor Computing for Neural Networks
    Koki Ishida*, IlKkwon Byun*, Ikki Nagaoka, Kosuke Fukumitsu, Masamitsu Tanaka, Satoshi Kawakami, Teruo Tanimoto, Takatsugu Ono, Jangwoo Kim, and Koji Inoue
    IEEE Micro Special Issue: Top Picks from Computer Architecture Conferences (IEEE’s Micro Top Picks), May/June. 2021
  • SuperNPU: An Extremely Fast Neural Processing Unit Using Superconducting Logic Devices
    Koki Ishida*, Ilkwon Byun*, Ikki Nagaoka, Kosuke Fukumitsu, Masamitsu Tanaka, Satoshi Kawakami, Teruo Tanimoto, Takatsugu Ono, Jangwoo Kim, and Koji Inoue
    ACM/IEEE International Symposium on Microarchitecture (MICRO), Oct 2020
  • CryoCore: A Fast and Dense Processor Architecture for Cryogenic Computing
    Ilkwon Byun*, Dongmoon Min*, Gyu-Hyeon Lee, Seongmin Na, and Jangwoo Kim
    ACM/IEEE International Symposium on Computer Architecture (ISCA), Jun 2020
  • CryoCache: A Fast, Large, and Cost-Effective Cache Architecture for Cryogenic Computing
    Dongmoon Min, Ilkwon Byun, Gyu-Hyeon Lee, Seongmin Na, and Jangwoo Kim
    ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), Mar 2020
  • Cryogenic Computer Architecture Modeling with Memory-Side Case Studies
    Gyuhyeon Lee*, Dongmoon Min*, Ilkwon Byun*, and Jangwoo Kim
    ACM/IEEE International Symposium on Computer Architecture (ISCA), Jun 2019

* Contributed equally