Members: Gyuhyeon Lee, Dongmoon Min, Il-kwon Byun, Yujin Chung, Junpyo Kim
As Moore’s law and Dennard Scaling stop to scale, computer architects now have serious difficulty in improving the performance and power-efficiency of modern computers. To resolve the issue, we propose cryogenic computing which is to run computers at ultra-low temperatures to benefit from the reduced wire latency and leakage current. We provide a cryogenic computer architecture modeling tool and introduce various example cryogenic computer architecture solutions.
Modeling methodology. To design a cost-effective cryogenic computer, computer architects need a design tool to estimate their target designs’ potential and costs at various temperatures. To resolve the issue, we have been developing CryoSim, a cryogenic computer architecture modeling tool carefully validated with various literature, industry-provided data, and our in-house experiments. We are currently preparing to release its first version to the public.
Cryogenic computer [ISCA’19, ASPLOS’20, ISCA’20, ISCA’21]. As 77K (or -196C) temperature can be cost-effectively achieved by applying Liquid Nitrogen and CMOS devices still reliably operate at 77K, we aim to design computer architecture devices running at 77K. For this purpose, we build our own architecture performance and power simulation methodology for the processor, cache, and memory running at 77K, and introduce their temperature-optimized architecture designs, which are CryoCore (cryogenic-optimal processor), CryoCache (cryogenic-optimal cache), and CryoRAM (cryogenic-optimal memory). We are currently working on integrating and prototyping the proposed solutions as a full-system cryogenic server solution.
Superconducting computer [MICRO’20]. To achieve an extreme performance by reducing the temperature much further, we also focus on extremely low temperatures such as <4K (or -269C) or superconducting temperatures. But, at <4K, architects should use superconducting transistors (e.g., RSFQ, AQFP) whose architecture design principles have not been yet actively explored. To resolve the issue, we design a computer architecture modeling tool for <4K, follow new design principles, and develop superconducting computer designs. For example, SuperNPU, our joint work with Kyushu University and Nagoya University, shows how to architect an extreme-performance domain accelerator with the superconducting devices.
- CryoGuard: A Near Refresh-Free Robust DRAM Design for Cryogenic Computing
Gyuhyeon Lee, Seongmin Na, Ilkwon Byun, Dongmoon Min, and Jangwoo Kim
48th ACM/IEEE International Symposium on Computer Architecture (ISCA), June. 2021 (to appear)
- SuperNPU: An Extremely Fast Neural Processing Unit Using Superconducting Logic Devices
*Koki Ishida, *Ilkwon Byun, Ikki Nagaoka, Kosuke Fukumitsu, Masamitsu Tanaka, Satoshi Kawakami, Teruo Tanimoto, Takatsugu Ono, Jangwoo Kim, and Koji Inoue
ACM/IEEE International Symposium on Microarchitecture (MICRO), Oct 2020
- CryoCore: A Fast and Dense Processor Architecture for Cryogenic Computing
*Ilkwon Byun, *Dongmoon Min, Gyu-Hyeon Lee, Seongmin Na, and Jangwoo Kim
ACM/IEEE International Symposium on Computer Architecture (ISCA), Jun 2020
- CryoCache: A Fast, Large, and Cost-Effective Cache Architecture for Cryogenic Computing
Dongmoon Min, Ilkwon Byun, Gyu-Hyeon Lee, Seongmin Na, and Jangwoo Kim
ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), Mar 2020
- Cryogenic Computer Architecture Modeling with Memory-Side Case Studies
*Gyuhyeon Lee, *Dongmoon Min, *Ilkwon Byun, and Jangwoo Kim
ACM/IEEE International Symposium on Computer Architecture (ISCA), Jun 2019
* Contributed equally