Two papers are accepted to ASPLOS 2026
S. Song et al., “TierX: A Simulation Framework for Multi-tier BCI System Design Evaluation and Exploration”, ASPLOS 2026
J. Cho, H. Jeong et al, “Accelerating Computation in Quantum LDPC Code”, ASPLOS 2026
S. Song et al., “TierX: A Simulation Framework for Multi-tier BCI System Design Evaluation and Exploration”, ASPLOS 2026
J. Cho, H. Jeong et al, “Accelerating Computation in Quantum LDPC Code”, ASPLOS 2026
H. Jeong, K. Choi et al., “FS2: A Fast, Scalable and Flexible Switching System for Emerging Interconnects”, IEEE Micro
H. Jeong, W. Lee et al., “MangoBoost Alice: Extremely Fast, Seamless, and Versatile FPGA-accelerated DPU Solutions”, IEEE Micro
J. Choi et al., “SuperSFQ: A Hardware Design to Realize High-Frequency Superconducting Processors”, MICRO 2025
J. Kim et al., “LANCER: Low-Overhead, Accurate, and Non-Destructive Calibration for Real-World Fault-Tolerant Quantum Applications”, MICRO 2025
Y. Jang, D. Jung et al., “InfiniMind: A Learning-Optimized Large-Scale Brain-Computer Interface”, ISCA 2025
J. Choi, I. Byun et al., “SuperCore: An Ultra-Fast Superconducting Processor For Cryogenic Applications”, MICRO 2024
H. Lee et al., “Rearchitecting a Neuromorphic Processor for Spike-Driven Brain-Computer Interfacing”, MICRO 2024
D.min, et al., “CoolDC: A Cost-Effective Immersion-Cooled Datacenter with Workload-Aware Temperature Scaling”, TACO 2024
J. Kim, et al., “A Fault-Tolerant Million Qubit-Scale Distributed Quantum Computer”, ASPLOS 2024