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One paper is accepted to OSDI 2020

D. Kwon et al., “FVM: FPGA-assisted Virtual Device Emulation for Fast, Scalable, and Flexible Storage Virtualization”, OSDI 2020

By |September 7th, 2020|Latest News|Comments Off on One paper is accepted to OSDI 2020

Two papers are accepted to MICRO 2020

P. Park et al., “TrainBox: An Extreme-Scale Neural Network Training Server Architecture by Systematically Balancing Operations”, MICRO 2020

K. Ishida, I. Byun et al., “SuperNPU: An Extremely Fast Neural Processing Unit Using Superconducting Logic Devices”, MICRO 2020

By |July 19th, 2020|2020, Latest News, News|Comments Off on Two papers are accepted to MICRO 2020

Two papers are accepted to ISCA 2020

I. Byun et al., “CryoCore: A Fast and Dense Processor Architecture for Cryogenic Computing”, ISCA 2020

E. Baek et al., “A Multi-Neural Network Acceleration Architecture”, ISCA 2020

By |March 6th, 2020|2020, Latest News, News|Comments Off on Two papers are accepted to ISCA 2020

One paper is accepted to DAC 2020

D. Kwon et al., “Scalable Multi-FPGA Acceleration for Large RNNs with Full Parallelism Levels”, DAC 2020

By |March 6th, 2020|2020, Latest News, News|Comments Off on One paper is accepted to DAC 2020

One paper is accepted to ASPLOS 2020

D. Min et al., “CryoCache: A Fast, Large, and Cost-Effective Cache Architecture for Cryogenic Computing”, ASPLOS 2020 (to appear)

By |December 3rd, 2019|2020, Latest News, News|Comments Off on One paper is accepted to ASPLOS 2020

Two papers are accepted to MICRO 2019

M. Ajdari et al., “FIDR: A Scalable Storage System for Fine-Grain Inline Data Reduction with Efficient Memory Handling”, MICRO 2019

E. Baek et al., “FlexLearn: Fast and Highly Efficient Brain Simulations Using Flexible On-Chip Learning”, MICRO 2019

By |September 4th, 2019|2019, Latest News, News|Comments Off on Two papers are accepted to MICRO 2019

Two papers are accepted to ISCA 2019

G. Lee et al., “Cryogenic Computer Architecture Modeling with Memory-Side Case Studies”, ISCA 2019

H. Jang et al., “MnnFast: A Fast and Scalable System Architecture for Memory-Augmented Neural Networks”, ISCA 2019

By |March 17th, 2019|2019, Latest News, News|Comments Off on Two papers are accepted to ISCA 2019

One paper is accepted to EuroSys 2019

Y. Kim et al., “μLayer: Low Latency On-Device Inference Using Cooperative Single-Layer Acceleration and Processor-Friendly Quantization”, to appear in EuroSys 2019

By |December 24th, 2018|2019, Latest News, News, 미분류|Comments Off on One paper is accepted to EuroSys 2019

One paper is accepted to HPCA 2019

M. Ajdari et al., “CIDR: A Cost-Effective In-line Data Reduction System for Terabit-per-Second Scale SSD Arrays”,  HPCA 2019

By |December 21st, 2018|2019, Latest News, News|Comments Off on One paper is accepted to HPCA 2019

Two papers are accepted to MICRO 2018

H. Jang et al., “RpStacks-MT: A High-throughput Multi-core Processor Design Evaluation Methodology”, MICRO 2018

J. Kim et al., “SSDcheck: Timely and Accurate Prediction of Irregular Behaviors in Black-Box SSDs”, MICRO 2018

By |July 24th, 2018|2018, Latest News, News|Comments Off on Two papers are accepted to MICRO 2018