2020

//2020

Two papers are accepted to MICRO 2020

P. Park et al., “An Extreme-Scale Neural Network Training Server by Systematically Balancing Operations”, MICRO 2020

K. Ishida, I. Byun et al., “Architecting an Extremely Fast Neural Processing Unit Using Superconducting Logic Devices”, MICRO 2020

By |July 19th, 2020|2020, Latest News, News|Comments Off on Two papers are accepted to MICRO 2020

Two papers are accepted to ISCA 2020

I. Byun et al., “CryoCore: A Fast and Dense Processor Architecture for Cryogenic Computing”, ISCA 2020

E. Baek et al., “A Multi-Neural Network Acceleration Architecture”, ISCA 2020

By |March 6th, 2020|2020, Latest News, News|Comments Off on Two papers are accepted to ISCA 2020

One paper is accepted to DAC 2020

D. Kwon et al., “Scalable Multi-FPGA Acceleration for Large RNNs with Full Parallelism Levels”, DAC 2020

By |March 6th, 2020|2020, Latest News, News|Comments Off on One paper is accepted to DAC 2020

One paper is accepted to ASPLOS 2020

D. Min et al., “CryoCache: A Fast, Large, and Cost-Effective Cache Architecture for Cryogenic Computing”, ASPLOS 2020 (to appear)

By |December 3rd, 2019|2020, Latest News, News|Comments Off on One paper is accepted to ASPLOS 2020